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1
ReSense: Mapping dynamic workloads of colocated multithreaded applications using resource sensitivity
December 2013
ACM Transactions on Architecture and Code Optimization (TACO): Volume 10 Issue 4, December 2013
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 4, Downloads (12 Months): 25, Downloads (Overall): 390
Full text available:
 PDF
To utilize the full potential of modern chip multiprocessors and obtain scalable performance improvements, it is critical to mitigate resource contention created by multithreaded workloads. In this article, we describe ReSense, the first runtime system that uses application characteristics to dynamically map multithreaded applications from dynamic workloads—workloads where multithreaded applications ...
Keywords:
thread mapping, multicore, resource contention, multithreaded applications, memory hierarchy
2
Marple: Detecting faults in path segments using automatically generated analyses
July 2013
ACM Transactions on Software Engineering and Methodology (TOSEM) - In memoriam, fault detection and localization, formal methods, modeling and design: Volume 22 Issue 3, July 2013
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 3, Downloads (12 Months): 34, Downloads (Overall): 254
Full text available:
PDF
Generally, a fault is a property violation at a program point along some execution path. To obtain the path where a fault occurs, we can either run the program or manually identify the execution paths through code inspection. In both of the cases, only a very limited number of execution ...
Keywords:
demand-driven, specification, Path segments, faults
3
ReQoS: reactive static/dynamic compilation for QoS in warehouse scale computers
March 2013
ASPLOS '13: Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
Publisher: ACM
Bibliometrics:
Citation Count: 14
Downloads (6 Weeks): 7, Downloads (12 Months): 50, Downloads (Overall): 453
Full text available:
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As multicore processors with expanding core counts continue to dominate the server market, the overall utilization of the class of datacenters known as warehouse scale computers (WSCs) depends heavily on colocation of multiple workloads on each server to take advantage of the computational power provided by modern processors. However, many ...
Keywords:
compiler, contention, dynamic techniques, runtime systems, quality of service, warehouse scale computers, cross-core interference, datacenter, multicore, online adaptation
Also published in:
March 2013
ACM SIGARCH Computer Architecture News - ASPLOS '13: Volume 41 Issue 1, March 2013 April 2013
ACM SIGPLAN Notices - ASPLOS '13: Volume 48 Issue 4, April 2013
4
Educating Diverse Computing Students at the University of Virginia
March 2013
Computer: Volume 46 Issue 3, March 2013
Publisher: IEEE Computer Society Press
This article reports on the University of Virginia Computer Science Department’s efforts to attract and instruct diverse students in undergraduate computing majors. These efforts are important for meeting workforce needs, creative problem-solving, and equitable access to rewarding occupations. The University of Virginia computer science introductory curriculum accommodates different levels of ...
Keywords:
Gender issues,Equal opportunities,Computer science education,Programming profession,Education courses,Educational institutions,Professional aspects,Laboratories,Programming profession,Computers,Educational institutions,Conferences,Computers,Programming profession,Laboratories,Programming profession,Educational institutions,Conferences,Computers,Programming profession,Laboratories,Laboratories,Educational institutions,Conferences
5
Memory optimization of dynamic binary translators for embedded systems
October 2012
ACM Transactions on Architecture and Code Optimization (TACO): Volume 9 Issue 3, September 2012
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 1, Downloads (12 Months): 10, Downloads (Overall): 285
Full text available:
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Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. DBT-based services are valuable for all types of platforms. However, the high memory demands of DBTs present an obstacle for embedded systems. Most research on DBT design has a performance focus, which often drives up the ...
6
THeME: a system for testing by hardware monitoring events
July 2012
ISSTA 2012: Proceedings of the 2012 International Symposium on Software Testing and Analysis
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 6, Downloads (12 Months): 16, Downloads (Overall): 211
Full text available:
PDF
The overhead of test coverage analysis is dominated by monitoring the application, which is traditionally performed using instrumentation. However, instrumentation can prohibitively increase the time and especially the memory overhead of an application. As an alternative to instrumentation, we explore how recent hardware advances can be leveraged to improve the ...
7
Increasing Utilization in Modern Warehouse-Scale Computers Using Bubble-Up
May 2012
IEEE Micro: Volume 32 Issue 3, May 2012
Publisher: IEEE Computer Society Press
Precisely predicting performance degradation due to colocating multiple executing applications on a single machine is critical for improving utilization in modern warehouse-scale computers (WSCs). Bubble-Up is the first mechanism for such precise prediction. As opposed to over-provisioning machines, Bubble-Up enables the safe colocation of multiple workloads on a single machine ...
Keywords:
Bubble-Up, warehouse-scale computer, performance degradation, quality of service
8
Performance analysis of thread mappings with a holistic view of the hardware resources
April 2012
ISPASS '12: Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software
Publisher: IEEE Computer Society
With the shift to chip multiprocessors, managing shared resources has become a critical issue in realizing their full potential. Previous research has shown that thread mapping is a powerful tool for resource management. However, the difficulty of simultaneously managing multiple hardware resources and the varying nature of the workloads have ...
9
Compiling for niceness: mitigating contention for QoS in warehouse scale computers
March 2012
CGO '12: Proceedings of the Tenth International Symposium on Code Generation and Optimization
Publisher: ACM
Bibliometrics:
Citation Count: 19
Downloads (6 Weeks): 2, Downloads (12 Months): 53, Downloads (Overall): 345
Full text available:
PDF
As the class of datacenters recently coined as warehouse scale computers (WSCs) continues to leverage commodity multicore processors with increasing core counts, there is a growing need to consolidate various workloads on these machines to fully utilize their computation power. However, it is well known that when multiple applications are ...
10
REEact: a customizable virtual execution manager for multicore platforms
March 2012
VEE '12: Proceedings of the 8th ACM SIGPLAN/SIGOPS conference on Virtual Execution Environments
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 1, Downloads (12 Months): 12, Downloads (Overall): 221
Full text available:
PDF
With the shift to many-core chip multiprocessors (CMPs), a critical issue is how to effectively coordinate and manage the execution of applications and hardware resources to overcome performance, power consumption, and reliability challenges stemming from hardware and application variations inherent in this new computing environment. Effective resource and application management ...
Keywords:
virtual execution environment, run-time adaptation, chip multiprocessor, resource management
Also published in:
September 2012
ACM SIGPLAN Notices - VEE '12: Volume 47 Issue 7, July 2012
11
Bubble-Up: increasing utilization in modern warehouse scale computers via sensible co-locations
December 2011
MICRO-44: Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: ACM
Bibliometrics:
Citation Count: 80
Downloads (6 Weeks): 10, Downloads (12 Months): 131, Downloads (Overall): 720
Full text available:
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As much of the world's computing continues to move into the cloud, the overprovisioning of computing resources to ensure the performance isolation of latency-sensitive tasks, such as web search, in modern datacenters is a major contributor to low machine utilization. Being unable to accurately predict performance degradation due to contention ...
12
Focusing high school teachers on attracting diverse students to computer science and engineering
October 2011
FIE '11: Proceedings of the 2011 Frontiers in Education Conference
Publisher: IEEE Computer Society
An effective workshop has been developed for promoting a positive impact on high school teachers' recruitment of students, particularly women and minority students, into their CS classes. All past workshop attendees indicate they now are actively try to recruit girls and minority students into their computing classes and are successful ...
13
Jazz2: a flexible and extensible framework for structural testing in a Java VM
August 2011
PPPJ '11: Proceedings of the 9th International Conference on Principles and Practice of Programming in Java
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 1, Downloads (12 Months): 7, Downloads (Overall): 83
Full text available:
PDF
This paper describes a framework for structural testing in a Java Virtual Machine (JVM), called Jazz2. The framework provides instrumentation, memory management, control flow analysis, and callback handling services for structural tests, such as branch and node coverage. Additionally, it has a language for the specification of how and where ...
Keywords:
code coverage, demand-driven instrumentation, testing, Java programming language, structural testing
14
Generating analyses for detecting faults in path segments
July 2011
ISSTA '11: Proceedings of the 2011 International Symposium on Software Testing and Analysis
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 1, Downloads (12 Months): 15, Downloads (Overall): 213
Full text available:
PDF
Although static bug detectors are extensively applied, there is a cost in using them. One challenge is that static analysis often reports a large number of false positives but little diagnostic information. Also, individual bug detectors need to be built in response to new types of faults, and tuning a ...
Keywords:
generate analysis, demand-driven, specification, path segment
15
Contentiousness vs. sensitivity: improving contention aware runtime systems on multicore architectures
June 2011
EXADAPT '11: Proceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era
Publisher: ACM
Bibliometrics:
Citation Count: 13
Downloads (6 Weeks): 5, Downloads (12 Months): 16, Downloads (Overall): 248
Full text available:
PDF
Runtime systems to mitigate memory resource contention problems on multicore processors have recently attracted much research attention. One critical component of these runtimes is the indicators to rank and classify applications based on their contention characteristics. However, although there has been significant research effort, application contention characteristics remain not well ...
Keywords:
memory subsystems, contentiousness vs sensitivity, multicore processors, contention aware runtimes, scheduling
16
Loaf: a framework and infrastructure for creating online adaptive solutions
June 2011
EXADAPT '11: Proceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1, Downloads (12 Months): 8, Downloads (Overall): 117
Full text available:
PDF
Achieving effective online adaptation for natively executed applications has proved quite challenging and to date has not been widely adopted. Traditionally, to enable online adaptation for native binary applications, a run-time layer is added that virtualizes the execution of the application by performing dynamic binary to binary translation. This virtual ...
Keywords:
cross-core interference, profiling framework, program understanding
17
The impact of memory subsystem resource sharing on datacenter applications
June 2011
ISCA '11: Proceedings of the 38th annual international symposium on Computer architecture
Publisher: ACM
Bibliometrics:
Citation Count: 58
Downloads (6 Weeks): 7, Downloads (12 Months): 33, Downloads (Overall): 841
Full text available:
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In this paper we study the impact of sharing memory resources on five Google datacenter applications: a web search engine, bigtable, content analyzer, image stitching , and protocol buffer . While prior work has found neither positive nor negative effects from cache sharing across the PARSEC benchmark suite, we find ...
Keywords:
thread scheduling, contention, thread-to-core mapping, workload characterization, datacenter, multicore
Also published in:
June 2011
ACM SIGARCH Computer Architecture News - ISCA '11: Volume 39 Issue 3, June 2011
18
Lazy preemption to enable path-based analysis of interrupt-driven code
May 2011
SESENA '11: Proceedings of the 2nd Workshop on Software Engineering for Sensor Network Applications
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1, Downloads (12 Months): 4, Downloads (Overall): 59
Full text available:
PDF
One of the important factors in ensuring the correct functionality of wireless sensor networks (WSNs) is the reliability of the software running on individual sensor nodes. Research has shown that path-sensitive static analysis is effective for bug detection and fault diagnosis; however, path-sensitive analysis is prohibitively expensive when applied to ...
Keywords:
interrupt-driven, lazy preemption, path-based analysis
19
Exploiting hardware advances for software testing and debugging (NIER track)
May 2011
ICSE '11: Proceedings of the 33rd International Conference on Software Engineering
Publisher: ACM
Bibliometrics:
Citation Count: 9
Downloads (6 Weeks): 6, Downloads (12 Months): 29, Downloads (Overall): 187
Full text available:
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Despite the emerging ubiquity of hardware monitoring mechanisms and prior research work in other fields, the applicability and usefulness of hardware monitoring mechanisms have not been fully scrutinized for software engineering. In this work, we identify several recently developed hardware mechanisms that lend themselves well to structural test overage analysis ...
Keywords:
branch testing, performance monitoring, fault localization
20
Characterizing multi-threaded applications based on shared-resource contention
April 2011
ISPASS '11: Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software
Publisher: IEEE Computer Society
For higher processing and computing power, chip multiprocessors (CMPs) have become the new mainstream architecture. This shift to CMPs has created many challenges for fully utilizing the power of multiple execution cores. One of these challenges is managing contention for shared resources. Most of the recent research address contention for ...
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